Worst-case test vectors for logic faults induced by total dose in ASICs using CMOS processes exhibiting field-oxide leakage
Author's Department
Electronics & Communications Engineering Department
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https://doi.org/10.1109/TNS.2011.2128346
Document Type
Research Article
Publication Title
IEEE Transactions on Nuclear Science
Publication Date
6-1-2011
doi
10.1109/TNS.2011.2128346
First Page
1047
Last Page
1052
Recommended Citation
APA Citation
Abou-Auf, A.
Abdel-Aziz, H.
&
Wassal, A.
(2011). Worst-case test vectors for logic faults induced by total dose in ASICs using CMOS processes exhibiting field-oxide leakage. IEEE Transactions on Nuclear Science, 58(3 PART 2), 1047–1052.
https://doi.org/10.1109/TNS.2011.2128346
MLA Citation
Abou-Auf, Ahmed A., et al.
"Worst-case test vectors for logic faults induced by total dose in ASICs using CMOS processes exhibiting field-oxide leakage." IEEE Transactions on Nuclear Science, vol. 58, no. 3 PART 2, 2011, pp. 1047–1052.
https://doi.org/10.1109/TNS.2011.2128346
