Abstract
Charged particles and energetic particles can impact the integrated circuit, referred to as single event effects (SEE). Nuclear reactors and space radiation can produce these particles. These effects can negatively affect the reliability and performance of electronics. When SEE occurs, a transient current is created, which can cause electronic devices to have incorrect outputs and ultimately fail. As a result, ensuring the reliability of ASIC circuits is a significant concern.
This thesis discusses the different fault types, then discuss the soft error and, in particular, the Single Event Transient (SET) and its causes and models. Then, this thesis proposes a new model to get the probability of error of standard cells using a pre-characterized cell module. The proposed method guarantees that no logical masking and over-estimation of the probability of error has occurred. Furthermore, it suggests calculating the error probability of the whole combinational circuit in application-specific integrated circuits (ASIC) using the Krishnaswamy method and a newly proposed method. Finally, this thesis presents a new approach to getting the worst-case vector based on Krishnaswamy and a newly proposed method. The flow gets the most probable vector as the worst-case vector from a set of vectors generated from the Automated Test Pattern Generation (ATPG) tool. In addition, a new error metric is discussed to find the worst-case vector based on two-norm.
School
School of Sciences and Engineering
Department
Electronics & Communications Engineering Department
Degree Name
MS in Electronics & Communication Engineering
Graduation Date
Spring 6-21-2023
Submission Date
5-22-2023
First Advisor
Ahmed Abou-Auf
Committee Member 1
Amr Wassal
Committee Member 2
Yehea Ismail
Committee Member 3
Sherif Abdel Azeem
Extent
118 p.
Document Type
Master's Thesis
Institutional Review Board (IRB) Approval
Approval has been obtained for this item
Recommended Citation
APA Citation
Hemeda, M.
(2023).Stochastic Worst-Case Test Vectors for ASIC Devices in Single Event Environment [Master's Thesis, the American University in Cairo]. AUC Knowledge Fountain.
https://fount.aucegypt.edu/etds/2120
MLA Citation
Hemeda, Mostafa. Stochastic Worst-Case Test Vectors for ASIC Devices in Single Event Environment. 2023. American University in Cairo, Master's Thesis. AUC Knowledge Fountain.
https://fount.aucegypt.edu/etds/2120