Worst Case Test Vectors for Sequential Circuits in Flash-Based FPGAs Exposed to Total Dose
Funding Sponsor
American University in Cairo
Author's Department
Electronics & Communications Engineering Department
Find in your Library
https://doi.org/10.1109/TNS.2019.2920449
Document Type
Research Article
Publication Title
IEEE Transactions on Nuclear Science
Publication Date
7-1-2019
doi
10.1109/TNS.2019.2920449
First Page
1642
Last Page
1650
Recommended Citation
APA Citation
Abdelwahab, M.
Abdel-Azizz, M.
Abdelgawad, M.
Abou-Auf, A.
&
Ibrahim, M.
(2019). Worst Case Test Vectors for Sequential Circuits in Flash-Based FPGAs Exposed to Total Dose. IEEE Transactions on Nuclear Science, 66(7), 1642–1650.
10.1109/TNS.2019.2920449
https://fount.aucegypt.edu/faculty_journal_articles/947
MLA Citation
Abdelwahab, M. S., et al.
"Worst Case Test Vectors for Sequential Circuits in Flash-Based FPGAs Exposed to Total Dose." IEEE Transactions on Nuclear Science, vol. 66,no. 7, 2019, pp. 1642–1650.
https://fount.aucegypt.edu/faculty_journal_articles/947