A Comprehensive Comparison between Design for Testability Techniques for Total Dose Testing of Flash-Based FPGAs
Author's Department
Electronics & Communications Engineering Department
Third Author's Department
Electronics & Communications Engineering Department
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https://doi.org/10.1109/TNS.2021.3086408
Document Type
Research Article
Publication Title
IEEE Transactions on Nuclear Science
Publication Date
8-1-2021
doi
10.1109/TNS.2021.3086408
Abstract
A comprehensive comparison between different design for testability (DFT) techniques for total-ionizing-dose (TID) testing of flash-based field-programmable gate arrays (FPGAs) is made to help designers choose the best suitable DFT technique depending on their application. The comparison includes muxed D scan, clocked scan, and enhanced scan DFT techniques. The comparison is done using ISCAS'89 benchmarks circuits. Points of comparisons include FPGA resources utilization, difficulty in design bring-up, added delay by DFT logic, and robust testable paths in each technique. We verified the results of each technique experimentally using Microsemi ProASIC3 FPGA's and Cobalt 60 facility. The experimental results show a close total-dose failure level for all techniques when using worst-case test vectors (WCTVs) in total-dose testing of FPGA devices.
First Page
2232
Last Page
2238
Recommended Citation
APA Citation
Ibrahim, M.
Abdel-Aziz, M.
Abdelwahab, M.
Mohamed, A.
...
(2021). A Comprehensive Comparison between Design for Testability Techniques for Total Dose Testing of Flash-Based FPGAs. IEEE Transactions on Nuclear Science, 68(8), 2232–2238.
10.1109/TNS.2021.3086408
https://fount.aucegypt.edu/faculty_journal_articles/2630
MLA Citation
Ibrahim, M. A., et al.
"A Comprehensive Comparison between Design for Testability Techniques for Total Dose Testing of Flash-Based FPGAs." IEEE Transactions on Nuclear Science, vol. 68,no. 8, 2021, pp. 2232–2238.
https://fount.aucegypt.edu/faculty_journal_articles/2630