Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison
Second Author's Department
Computer Science & Engineering Department
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Midwest Symposium on Circuits and Systems
Computer Aided Design (CAD) tools are widely used in Application Specific Integrated Circuit (ASIC) design. CAD tools provide a simple process for the IC design. For that purpose open source EDA tools are used for study and research of an IC design. This describes how the open source EDA tools could help the researchers and students to learn and fabricate their own Integrated circuits. In this paper, we present the digital ASIC implementation of RISC-V "DwarfRV32". The design is implemented using two approaches, which are the OpenLane flow and the Commercial tools. We then compare between the two flows on important parameters like timing performance and power consumption.
(2021). Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison. Midwest Symposium on Circuits and Systems, 2021-August, 498–502.
Hesham, Sarah, et al.
"Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison." Midwest Symposium on Circuits and Systems, vol. 2021-August, 2021, pp. 498–502.