Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison
Second Author's Department
Computer Science & Engineering Department
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https://doi.org/10.1109/MWSCAS47672.2021.9531753
Document Type
Research Article
Publication Title
Midwest Symposium on Circuits and Systems
Publication Date
8-9-2021
doi
10.1109/MWSCAS47672.2021.9531753
Abstract
Computer Aided Design (CAD) tools are widely used in Application Specific Integrated Circuit (ASIC) design. CAD tools provide a simple process for the IC design. For that purpose open source EDA tools are used for study and research of an IC design. This describes how the open source EDA tools could help the researchers and students to learn and fabricate their own Integrated circuits. In this paper, we present the digital ASIC implementation of RISC-V "DwarfRV32". The design is implemented using two approaches, which are the OpenLane flow and the Commercial tools. We then compare between the two flows on important parameters like timing performance and power consumption.
First Page
498
Last Page
502
Recommended Citation
APA Citation
Hesham, S.
Shalan, M.
El-Kharashi, M.
&
Dessouky, M.
(2021). Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison. Midwest Symposium on Circuits and Systems, 2021-August, 498–502.
10.1109/MWSCAS47672.2021.9531753
https://fount.aucegypt.edu/faculty_journal_articles/2627
MLA Citation
Hesham, Sarah, et al.
"Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison." Midwest Symposium on Circuits and Systems, vol. 2021-August, 2021, pp. 498–502.
https://fount.aucegypt.edu/faculty_journal_articles/2627