Statistical design framework of submicron flip-flop circuits considering process variations
Author's Department
Electronics & Communications Engineering Department
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https://doi.org/10.1109/TSM.2010.2080693
Document Type
Research Article
Publication Title
IEEE Transactions on Semiconductor Manufacturing
Publication Date
2-1-2011
doi
10.1109/TSM.2010.2080693
First Page
69
Last Page
79
Recommended Citation
APA Citation
Sadrossadat, S.
Mostafa, H.
&
Anis, M.
(2011). Statistical design framework of submicron flip-flop circuits considering process variations. IEEE Transactions on Semiconductor Manufacturing, 24(1), 69–79.
10.1109/TSM.2010.2080693
https://fount.aucegypt.edu/faculty_journal_articles/2262
MLA Citation
Sadrossadat, Sayed Alireza, et al.
"Statistical design framework of submicron flip-flop circuits considering process variations." IEEE Transactions on Semiconductor Manufacturing, vol. 24,no. 1, 2011, pp. 69–79.
https://fount.aucegypt.edu/faculty_journal_articles/2262