D2. testing of 1.5 bit per stage pipelined analog to digital converter: 5 bits case study

Chapter Title

D2. testing of 1.5 bit per stage pipelined analog to digital converter: 5 bits case study

Files

Department

Electronics & Communications Engineering Department

Description

[abstract not available]

Publication Date

1-1-2013

Document Type

Book Chapter

Book Title

National Radio Science Conference, NRSC, Proceedings

ISBN

SCOPUS_ID:84982735892

Publisher

IEEE

City

Cairo, Egypt

First Page

439

Last Page

447

Keywords

1.5 bit/stage, Catastrophic faults, PADC, Structural testing

D2. testing of 1.5 bit per stage pipelined analog to digital converter: 5 bits case study

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