Testing of N-stage pipelined ADC using test input regeneration and sliding window techniques

Testing of N-stage pipelined ADC using test input regeneration and sliding window techniques

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Department

Electronics & Communications Engineering Department

Abstract

[abstract not available]

Publication Date

9-18-2013

Document Type

Book Chapter

Book Title

2013 3rd International Conference on Communications and Information Technology, ICCIT 2013

ISBN

SCOPUS_ID:84883857648

Publisher

IEEE

City

Beirut, Lebanon

First Page

366

Last Page

370

Keywords

1.5 bit per stage, PADC, Sliding Window Technique, Test Input Regeneration

Testing of N-stage pipelined ADC using test input regeneration and sliding window techniques

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