Abstract

As microprocessor power has been growing exponentially ever since the microprocessor industry started, power consumption has become a limiting factor in the design of microprocessors. This thesis investigates dynamic performance adjustment as a way to reduce the power consumption of microprocessors as much as possible while still meeting the needs of the user, using Dynamic Voltage and Frequency Scaling (DVFS). In the first part of the thesis an algorithm is designed to run offline in order to serve as a reference for how much power consumption can be reduced using any practically realizable DVFS algorithm. In the second part of the thesis, a practical algorithm for DVFS is developed. The reduction in power consumption it achieves is compared to the potential reduction in power consumption that was computed in the first part, in order to calculate how much of the potential improvement in power consumption could be achieved by the practical algorithm

Department

Computer Science & Engineering Department

Degree Name

MS in Computer Science

Date of Award

2-1-2007

Online Submission Date

12-12-2006

First Advisor

Khaled El Ayat

Committee Member 1

Amr El Kadi

Committee Member 2

Hassanein Amer

Committee Member 3

Ashraf Salem

Document Type

Thesis

Extent

116 leaves

Library of Congress Subject Heading 1

Microprocessors.

Rights

The American University in Cairo grants authors of theses and dissertations a maximum embargo period of two years from the date of submission, upon request. After the embargo elapses, these documents are made available publicly. If you are the author of this thesis or dissertation, and would like to request an exceptional extension of the embargo period, please write to thesisadmin@aucegypt.edu

Call Number

Thesis 2006/105

Location

mgfth

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