Schematic-driven physical verification: Fully automated solution for analog IC design

Authors

Ahmed Arafa, Mentor Graphics Corporation
Hend Wagieh, Mentor Graphics Corporation
Rami Fathy, Mentor Graphics Corporation
John Ferguson, Mentor Graphics Corporation
Doug Morgan, ON Semiconductor

Files

Department

Electronics & Communications Engineering Department

Abstract

[abstract not available]

Publication Date

1-1-2012

Document Type

Book Chapter

Book Title

International System on Chip Conference

ISBN

SCOPUS_ID:84872550992

Publisher

IEEE

City

Niagara Falls, NY

First Page

260

Last Page

264

Keywords

Analog Design, Physical Verification, Schematic Driven Physical Verification

Recommended Citation

APA Citation

Arafa, A. Wagieh, H. Fathy, R. Ferguson, J. & Morgan, D. (2012).Schematic-driven physical verification: Fully automated solution for analog IC design. IEEE. , 260-264
https://fount.aucegypt.edu/faculty_book_chapters/663

MLA Citation

Arafa, Ahmed, et al. Schematic-driven physical verification: Fully automated solution for analog IC design. IEEE, 2012.pp. 260-264
https://fount.aucegypt.edu/faculty_book_chapters/663