Energy-aware scratch-pad memory partitioning for embedded systems

Energy-aware scratch-pad memory partitioning for embedded systems

Department

Computer Science & Engineering Department

Abstract

Hierarchical memory organizations are used in embedded systems to reduce energy consumption and improve performance by exploiting the non-uniformity of memory accesses and assigning the frequently-accessed data to the low levels of memory hierarchy. Moreover, within a given level, energy can be further reduced and performance further enhanced by memory partitioning - whose principle is to divide the address space in several smaller blocks and to map these blocks to physical memory banks. Scratch-pad memories (SPMs) offer a good compromise - as on-chip storage in embedded systems - when taking into account performance, energy consumption, and die area. This paper addresses the problem of optimizing the partitioning of SPMs. Different from previous techniques, the cost function takes into account all the three major design objectives - energy consumption, performance, and die area, letting the designers decide on their relative importance for a specific project. The proposed approach proved to be computationally fast and very efficient when tested for several data-intensive applications, whose behavioral specifications contain multidimensional arrays as main data structures. © 2014 IEEE.

Publication Date

1-1-2014

Document Type

Book Chapter

Book Title

Proceedings - International Symposium on Quality Electronic Design, ISQED

ISBN

SCOPUS_ID:84899486807

Publisher

IEEE

City

Santa Clara, CA, USA

First Page

653

Last Page

659

Energy-aware scratch-pad memory partitioning for embedded systems
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