Testing current mode two-input logic gates

Authors

S. H. Amer, American University in Cairo
A. S. Emara, American University in Cairo
R. Mohie El-Din, American University in Cairo
M. M. Fouad, Cairo University
A. H. Madian, Atomic Energy Authority of Egypt

Files

Department

Electronics & Communications Engineering Department

Abstract

[abstract not available]

Publication Date

1-1-2014

Document Type

Book Chapter

Book Title

Canadian Conference on Electrical and Computer Engineering

ISBN

SCOPUS_ID:84908440122

Publisher

IEEE

City

Toronto, ON, Canada

First Page

1

Last Page

6

Keywords

current mode, fault model, stuck-at, testing

Recommended Citation

APA Citation

Amer, S. Emara, A. El-Din, R. Fouad, M. & Madian, A. (2014).Testing current mode two-input logic gates. IEEE. , 1-6
https://fount.aucegypt.edu/faculty_book_chapters/521

MLA Citation

Amer, S. H., et al. Testing current mode two-input logic gates. IEEE, 2014.pp. 1-6
https://fount.aucegypt.edu/faculty_book_chapters/521