Integration of Multiple Fault-Tolerant techniques for FPGA-based NCS Nodes

Integration of Multiple Fault-Tolerant techniques for FPGA-based NCS Nodes

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Department

Electronics & Communications Engineering Department

Abstract

[abstract not available]

Publication Date

1-17-2017

Document Type

Book Chapter

Book Title

Proceedings of 2016 11th International Conference on Computer Engineering and Systems, ICCES 2016

ISBN

SCOPUS_ID:85013661386

Publisher

IEEE

City

Cairo, Egypt

First Page

299

Last Page

304

Keywords

dynamic partial reconfiguration, Fault-Tolerant, FPGA, In-Loop, Markov Model, reliability, S2A, sensors, TMR, TR

Integration of Multiple Fault-Tolerant techniques for FPGA-based NCS Nodes

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