Fault secure FPGA-based TMR voter

Authors

Dina G. Mahmoud, American University in Cairo
Gehad I. Alkady, American University in Cairo
Hassanein H. Amer, American University in CairoFollow
Ramez M. Daoud, American University in Cairo
Ihab Adly, Tegrom

Files

Department

Electronics & Communications Engineering Department

Abstract

[abstract not available]

Publication Date

7-6-2018

Document Type

Book Chapter

Book Title

2018 7th Mediterranean Conference on Embedded Computing, MECO 2018 - Including ECYPS 2018, Proceedings

ISBN

SCOPUS_ID:85050690147

Publisher

IEEE

City

Piscataway, New Jersey

First Page

1

Last Page

4

Keywords

Alternating logic, DPR, Fault secure, Fault-tolerant, FPGA, SEU, TMR

Recommended Citation

APA Citation

Mahmoud, D. G. Alkady, G. I. Amer, H. H. Daoud, R. M. & Adly, I. (2018).Fault secure FPGA-based TMR voter. IEEE. , 1-4
https://fount.aucegypt.edu/faculty_book_chapters/207

MLA Citation

Mahmoud, Dina, et al. Fault secure FPGA-based TMR voter. IEEE, 2018.pp. 1-4
https://fount.aucegypt.edu/faculty_book_chapters/207