FPGA-based ethernet switch for NCS with partial fault tolerance

Authors

Gehad I. Alkady, American University in Cairo
Tarek K. Refaat, Cisco Systems
Markus Rentschler, Balluff GmbH
Ramez M. Daoud, American University in Cairo
Hassanein H. Amer, American University in CairoFollow
Hassan H. Halawa, American University in Cairo
Kawther Alshureify, American University in Cairo
Ihab Adly, The British University in Egypt
Hany M. Elsayed, Cairo University
Manar N. Shaker, Cairo University
Mohamed Refky, Cairo University

Files

Department

Electronics & Communications Engineering Department

Abstract

[abstract not available]

Publication Date

12-1-2019

Document Type

Book Chapter

Book Title

Proceedings of the International Conference on Microelectronics, ICM

ISBN

9781728140582

Publisher

IEEE

City

Piscataway, NJ

First Page

32

Last Page

35

Keywords

Dynamic Partial Configuration (DPR), Fault Tolerance, FPGA, In-Loop, Markov Model, NCS, Reliability, S2A

Recommended Citation

APA Citation

Alkady, G. Refaat, T. Rentschler, M. Daoud, R. ... (2019).FPGA-based ethernet switch for NCS with partial fault tolerance. IEEE. , 32-35
https://fount.aucegypt.edu/faculty_book_chapters/147

MLA Citation

Alkady, Gehad I., et al. FPGA-based ethernet switch for NCS with partial fault tolerance. IEEE, 2019.pp. 32-35
https://fount.aucegypt.edu/faculty_book_chapters/147