As microprocessor power has been growing exponentially ever since the microprocessor industry started, power consumption has become a limiting factor in the design of microprocessors. This thesis investigates dynamic performance adjustment as a way to reduce the power consumption of microprocessors as much as possible while still meeting the needs of the user, using Dynamic Voltage and Frequency Scaling (DVFS). In the first part of the thesis an algorithm is designed to run offline in order to serve as a reference for how much power consumption can be reduced using any practically realizable DVFS algorithm. In the second part of the thesis, a practical algorithm for DVFS is developed. The reduction in power consumption it achieves is compared to the potential reduction in power consumption that was computed in the first part, in order to calculate how much of the potential improvement in power consumption could be achieved by the practical algorithm


Computer Science & Engineering Department

Degree Name

MS in Computer Science

Date of Award


Online Submission Date


First Advisor

Khaled El Ayat

Committee Member 1

Amr El Kadi

Committee Member 2

Hassanein Amer

Committee Member 3

Ashraf Salem

Document Type



116 leaves

Library of Congress Subject Heading 1



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Call Number

Thesis 2006/105