FPGA-based reliable TMR controller design for S2A architectures

FPGA-based reliable TMR controller design for S2A architectures

Files

Department

Electronics & Communications Engineering Department

Description

[abstract not available]

Publication Date

10-19-2015

Document Type

Book Chapter

Book Title

IEEE International Conference on Emerging Technologies and Factory Automation, ETFA

ISBN

SCOPUS_ID:84952944927

Publisher

IEEE

City

Luxembourg, Luxembourg

First Page

1

Last Page

8

Keywords

dynamic fault recovery, fault-secure voter, fault-tolerance, FPGA, Markov Model, partial reconfiguration, reliability, S2A

FPGA-based reliable TMR controller design for S2A architectures

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